Electronic Engineering Department, The Chinese University of Hong Kong - Prof CHOY, Oliver Chiu Sing 蔡潮盛


Emeritus Professor
B.Sc., M.Sc., Ph.D. (Manchester), C.Eng., FHKIE, MIEE, SrMIEEE
homepage Rm 410, Ho Sin Hang Engineering Building phone Tel: +852 3943 8280 This email address is being protected from spambots. You need JavaScript enabled to view it.

Research Interests:

Network-on-Chip, Body Area Network, Structured ASIC, Asynchronous Communication Links, OFDM-UWB Digital Transceiver, Real-time Object Detection


hyperlink http://www.ee.cuhk.edu.hk/~cschoy/

Research Highlights


Resume of Career

Professor Chiu-sing Choy received his B.Sc., M.Sc. and Ph.D. from the University of Manchester in 1983, 1984 and 1987 respectively, major in electrical and electronics engineering. From 1985, he spent a year in Ferranti Microelectronics, Oldham, U.K., participating in ASIC technology research. In 1986, he joined Department of Electronic Engineering, The Chinese University of Hong Kong, where he is presently a Professor.

Prof. Choy is a fellow of HKIE. He was the chairperson the Electronics Division in 2006/07 and was a council member of HKIE. Prof. Choy is active in supporting the local electronics industry. He led a number of ITF supported industry projects in optical pick-up designs, RFID technology and Structured ASIC. Prof. Choy published widely with over hundred of papers to his credit. He serves in many international conferences and is at present a member of the steering committee of ASP-DAC, the Co-chair of the International Symposium on Applied Reconfigurable Computing 2012, and the publication chair of VLSI-SoC 2011.

Current Research Interests

Network-on-Chip, Body Area Network, Structured ASIC, Asynchronous Communication Links, OFDM-UWB Digital Transceiver, Real-time Object Detection

Highlights of Recent Research Achievements

  • Develop an innovative basic cell design for Structured ASIC achieving high area efficiency and performance.
  • Design a power efficient and low complexity baseband receiver for MB-OFDM UWB Systems.
  • Develop an effective arbitration logic for channel allocation in NoC routers.

Taught Courses

  • Basic Circuit Theory
  • Digital Circuits and Systems
  • Modern Digital Circuit Design
  • CMOS Integrated Circuits
  • VLSI Design Methodology and Testing

External Service in Recent 3 Years

  • Council Member, HKIE, 2010.
  • Member of Professional Assessment, HKIE 2010.
  • Member of Steering Committee, ASP-DAC from 2007.
  • Member of Technical Committee, APSIPA 2010.
  • Publication Chair, IEEE VLSI-SoC, 2011.
  • Conference Co-Chair ARC 2012.

Publications for the Past 3 Years


  1. W. Fan and C.S. Choy, 'Synchronization Technique for OFDM-Based UWB System,' Ultra-Wideband Communications: Novel Trends: System, Architecture and Implementation, Chapter 9, pages 10, In-Tech, Jul. 2011.
  2. C.S. Choy, R. Cheung, P. Athanas and K. Sano, 'Reconfigurable Computing: Architecture, Tools and Applications,' Lecture Notes in Computer Science, Vol. 7199, Springer 2012.
  3. S. Mir, C.Y. Tsui, R. Reis and C.S. Choy, 'VLSI-SoC: The Advanced Research for Systems on Chip,' IFIP Advances in Information and Communication Technology, Vol. 379, Springer 2012.

Journal Publications

  1. C.F. Chan, K.P. Pun, K.N. Leung, J.P. Guo, L.K. Leung and C.S. Choy, 'Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders,' IEEE Journal of Solid-State Circuits, Vol. 45, No. 3, pp. 587-599, Mar. 2010.

  2. K.N. Leung, C.S. Choy, K.P. Pun, L.K. Leung, J.P. Guo, Y.S. Ng, C.F. Chan, W.W. Shi, Y. Hong, M. Ho, K.L. Mak and Y.Q. Ai, 'RF Module Design of Passive UHF RFID Tag Implemented in CMOS90nm Technology,' Journal of Low Power Electronics, Vol. 6, No. 1, pp. 141-149, Apr, 2010.

  3. P.K. Chan, C.S. Choy, K.P. Pun, C.F. Chan and K.N. Leung, 'Analyse the Behaviors of Phase and Amplitude Mismatch Compensators to Achieve 82.5dB IRR,' International Journal of Electronics, Vol. 97, No. 5, pp. 553-568, May 2010.

  4. M. Zhang and C.S. Choy, 'Low-Cost Allocator Implementations for Networks-on-Chip Routers,' Journal of VLSI Design, 2010.

  5. K. Xu, .M. Zhang, C.S. Choy, 'Design a Low Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase,' Journal of Signal Processing Systems, 2010.

  6. W.C. Cheng, C.F. Chan, K.P. Pun and C.S. Choy, 'A Low Voltage Current Mode CMOS Integrated Receiver Front-end for GPS System,' Analog Integrated Circuits and Signal Processing, Springer Netherlands, Vol. 63, No. 1, pp. 23-31, Apr. 2010.

  7. X.Y. He, K.P. Pun, S.K. Tang, C.S. Choy, P. Kinget, 'A 0.5V 65.7dB 1 MHz continuous-time complex delta sigma modulator,' Analog Integrated Circuits and Signal Processing, Vol. 66, No. 2, pp. 255-267, Feb. 2011.

  8. W. Fan and C.S Choy, 'Robust, Low-Complexity and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System,' IEEE Transactions of CAS I, Vol.59, No. 2, pp. 399-408, Feb. 2011.

  9. M.H. Ho, Y.Q. Ai, T.C.P. Chau, S.C.L. Yuen, C.S. Choy, P.H.W. Leong and K.P. Pun, 'Architecture and Design Flow for a Highly Efficient Structured ASIC,' IEEE Transactions on VLSI Systems, Apr. 2012.

Conference Publications

  1. Steve C.L. Yuen, Yan-Qing Ai, Brian P.W. Chan, Thomas C.P. Chau, Sam M.H. Ho, Oscar K.L. Lau, Kong-Pang Pun, Philip H.W. Leong, C.S. Choy, 'Rapid Prototyping on a Structured ASIC Fabric', ASP-DAC 2010, Taipei, Taiwan, 8-12 Jan. 2010.

  2. Thomas C.P. Chau, P.H.W. Leong, S.M.H. Ho, B.P.W. Chan, S.C.L. Yuen, K.P. Pun, C.S. Choy and D. Wu, 'Design of a Single Layer Programmable Structured ASIC Library,' 13th IEEE International Symposium on Design and Diagnosis of Electronic Circuits and Systems, Vienna, Austria, 14-16 Apr. 2010.

  3. L. Xin and C.S. Choy, 'A Low-Latency NoC Router with lookahead Controlling Pipeline,' ISCAS 2010, Paris, France, 30 May-2 Jun. 2010.

  4. Y.Q. Ai, C.L. Yuen, S. Ho, C.P. Chau, K.P. Pun, P. Leong and C.S. Choy, 'Physical Design of A Structured ASIC Based on ASIC Design Methodology,' DAC 2010, Anaheim, C.A., 13-18 Jun. 2010.

  5. W.W. Shi, C.S. Choy, C.F. Chan, K.N. Leung and K.P. Pun, 'A 0.4V Low Power Baseband Processor for UHF Passive RFID Tags,' IEEE International NEWCAS Conference, Montreal, Canada, 20-23 Jun. 2010.

  6. J.P. Guo, W.W. Shi, K.N. Leung and C.S. Choy, 'Power-On-Reset Circuit with Power-Off Auto-Discharging Path for Passive RFID Tag ICs,' IEEE International Midwest Symposium on Circuits and Systems, Seattle, USA, 1-4 Aug. 2010.

  7. W.W. Shi, C.S. Choy, C.F. Chan, K.N. Leung and K.P. Pun, 'A 90nm RFID Tag's Baseband Processor with Novel PIE Decoder and Uplink Clock Generator,' IEEE International Midwest Symposium on Circuits and Systems, Seattle, USA, 1-4 Aug. 2010.

  8. F.Wen and C.S. Choy, 'Efficient and Low Complexity Phase Tracking Method for MB-OFDM UWB Receiver,' IEEE International Midwest Symposium on Circuits and Systems, Seattle, USA, 1-4 Aug. 2010.

  9. S.M.H. Ho, S.C.L. Yuen, H.C. Poon, T.C.P. Chau, Y.Q. Ai, P.H.W. Leong, C.S. Choy and K.P. Pun, 'Structured ASIC: Methodology and Comparison,' FPT 2010, Beijing, China, 8-10 Dec. 2010.

  10. W. Fan and C.S. Choy, 'Robust and Efficient Baseband Receiver Design for MB-OFDM UWB System,' ASPDAC 2011, Yokohoma, Japan, 25-28 Jan. 2011.


  1. '相位調制陣列微型光譜儀光譜復原方法', Chinese Patent CN101881663A, 2010.
  2. '微型自相干生物化學傳感器及其檢測方法', Chinese Patent CN10178843A, 2010.
  3. '相位調制凹槽陣列微型光譜儀', Chinese Patent CN101819063A, 2010.
  4. '相位調制台階陣列微型光譜儀', Chinese PatentCN101858786A, 2010.
  5. '超分辨率光學成像裝置與方法', Chinese Patent CN101858786A, 2010.