Objective
Driven by the AI boom, technologies such as robotics, virtual reality, and self-driving have begun to emerge, leading to an ever-increasing demand for high-efficiency, data-intensive computing. Inspired by the brain, post-von-Neumann neuromorphic computing was proposed. Mapping the biological neural networks to implement neuromorphic computing requires both algorithm and hardware designs. Although the algorithm approach is being widely exploited, neuromorphic hardware is still in its early stages of development, requiring continual advancements in the underlying materials, devices, and circuits. This course covers the most up-to-date research in the field of neuromorphic hardware. The course will begin with an introduction to neuromorphic computing, followed by discussions on neuromorphic hardware development, in which the students will study the materials, devices, and circuits exploited to enable neuromorphic hardware. In addition to lectures, the course includes lab case study sessions where students can have experience with neuromorphic hardware fabrication.

在人工智能熱潮的推動下，機器人、虛擬現實和自動駕駛等技術開始湧現，對高效、數據密集型的計算提出了不斷增長的需求。受大腦計算模型的啟發，後馮諾依曼的類腦計算方式被提出。映射生物神經網絡以實現類腦計算需要算法和硬件的設計。儘管類腦計算算法被廣泛使用，類腦計算的硬件開發仍處於早期階段，而它的發展依賴於其底層材料、器件和電路的不斷發展。本課程將討論類腦計算硬件設計的最新研究。課程將首先介紹類腦計算的概念，然後詳細討論類腦計算的硬件設計。學生將學習類腦計算硬件設計實現的材料、設備和電路。除了課堂授課，課程還設計了實驗室展示環節，學生可以在實驗室中參觀類腦計算的硬件製備。

Syllabus
Introduction to neuromorphic computing; Review on semiconductors, semiconductor devices and circuits; von Neumann architecture; Hardware implementations of artificial synapses and neurons; Device and circuit design and fabrication for neuromorphic hardware.

Learning Outcome
Upon successful completion of the course, students will be able to

• Be familiar with the von Neumann and non-von Neumann hardware architectures
• Gain the key fundamental knowledge of semiconductors, semiconductor devices and circuits to implement computation
• Apply the fundamental semiconductor knowledge to the design and implementation of the biological synapses and neurons and the neuromorphic hardware
• Well understand neuromorphic hardware development at device and circuit levels

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Objective

Syllabus
This course deals with methodologies to design VLSI circuits for DSP algorithms used in a wide range of signal processing applications. Architectural techniques to optimize for speed, power consumption or size include pipelining, retiming, unfolding, folding and systolic array. The course also introduces a hardware description language(HDL), and shows the example of using HDL to design a signal processing system. Practical work will be arranged for students to gain first hand experience of designing and implementing DSP algorithms.

Learning Outcome

1. Use signal diagram to describe digital signal processing algorithms
2. Understand different architectural transforms to optimize a VLSI DSP circuit for speed, power consumption or size.
3. Understand a Hardware Description Language and has the ability to use the HDL to design VLSI DSP circuits
4. Gain the experience of using FPGA Design Tools

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Objective & Syllabus
This course is designed to allow students to acquire a basic understanding and the skills of the practical aspects of the Electronic Engineering profession. During the internship, the student must attach to a company in a study-related position for no less than 12 weeks. The student will have an academic supervisor (as primary supervisor) and an industry co-supervisor from the company, both have the expertise to provide advice to the student. To be qualified for award of the subject credit, the student must submit a report summarizing the internship experience at the end of the internship. Additional presentation may be required by the hosting company. The internship should normally take place in the summer term after a student has finished the first two semesters of studies. Part-time students can decide to undertake the internship in the summer term of either the first or second year of studies. Students are recommended to seek the Professor-in-Charge's comment on potential internship opportunities before enrolling in the course.

Learning Outcome
At the end of the course of studies, a student should be able to

• Have a good understanding and appreciate the characteristics of an Electronic Engineering work environment, including employer expectation, management structure of a team, industrial standards and practices, trends and common issues in the Electronic Engineering, etc.;
• Carry out basic duties in an Electronic Engineering work environment;
• Exhibit good etiquette in the workplace;
• Work independently as well as in a team environment; and
• Communicate effectively and efficiently with peers, supervisors and possibly also clients.

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Objective
Introduction to wearable technology, reviews on wearable robotics, wearable sensor principles, wearable augmentation and machine intelligence, wearable design by "MINDS" (Miniaturization, Intelligence, Networking, Digitization, and Standardization), wearable medical devices and systems, wearable electro-physiologies, implantable therapeutic systems, sensor informatics, data-driven intelligent applications, and project topics of current interests.

Syllabus
Introduction to health informatics, fundamentals in electro-physiologies, reviews on bio-electronics including ion channels, sensor principles, e-textile sensing, flexible-stretchable-printable bioelectronics, organic transistors, wearable design by "MINDS" (Miniaturization, Intelligence, Networking, Digitization, and Standardization), wearable medical devices and systems, wearable robotics, implantable therapeutic systems, sensor informatics, applications, and topics of current interests.

Learning Outcome
Upon completion of this course, students will be able to

• Understand the basic concepts of wearable electronics technology
• Understand the basic principles of sensor technology for wearable device design
• Learn the fundamentals of wearable robotics
• Know how to design wearable devices and systems
• Familiar with applications of machine intelligence in wearable electronics and healthcare

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