BEng, MPhil, Ph.D., SMIEEE
Tel: +852 3943 8293
+852 2603 5558
Prof. Pun received his B.Eng. and M.Phil. degrees in Electronic Engineering from the
Chinese University of Hong Kong in 1995 and 1997 respectively, and
his Ph.D. degree in Electrical and Computer Engineering from the
Instituto Superior Técnico, Technical University of Lisbon, Portugal, in 2001.
In 1999, he worked part-timely at Chipidea Microelectronics S.A. as an IC
designer. In 2001, he joined the Department of
Electronic Engineering, Chinese University of Hong Kong.
where he is now an Associate Professor. He was
a visiting scholar at the Columbia Integrated Systems Laboratory, Columbia
University, during his leave from CUHK in the summer of 2004. Prof. Pun received
a Departmental Exemplary Teaching Award and a Faculty
Exemplary Teaching Award in 2005.
Prof. Pun served as the Chairman of IEEE Hong Kong Joint-Chapter of Electron
Devices and Solid-State Circuits in 2008 and 2009. He was general co-chair of IEEE Conference on
Electron Devices and Solid-State Circuits 2008 and was a member of ISSCC
International Technical Program Committee from 2008 to 2011. He was a guest editor of IEEE Transactions
on Circuits and System II: Express Brief, special issue on "Circuits and Systems
Solution for Nanoscale CMOS Design Challenges". His research interests include
circuits for complex signal processing, continuous-time filters, delta-sigma
modulators and ultra low-voltage circuits.
Basic Circuit Theory
Analog-Digital ASIC Design
ELE7240 CMOS Analog IC Design
Computer and Communication Technologies
GEC0413 Senior Seminar
Investigator, "Improved Techniques for High Precision Sensor Interfaces??,
General Research Fund (Formerly Competitive Earmarked Research Grant),
Research Grants Council, Hong Kong SAR Government, $444,959, Awarded in
Investigator, "A 0.5V 1MHz Complex Delta Sigma ADC for Bluetooth Receivers??,
Competitive Earmarked Research Grant, Research Grants Council, Hong Kong SAR
Government, $694,100, Dec. 2007 - Nov. 2009.
Principal Investigator, "Development of
Ultra Low Voltage Sigma-Delta Analog-to-Digital Converters", Competitive
Earmarked Research Grant, Research Grants Council, HKSAR Government,
HK$456,000, Dec. 2006 - Nov. 2008.
Principal Investigator, "Development of a
flexible IF-sampling Sigma Delta analogue-to-digital converter for
multi-mode cellular mobile terminals", Competitive Earmarked Research Grant,
Research Grants Council, HKSAR Government, HK$505,193.00, Sept. 2003 - Aug.
Coordinator, "Study the Design Challenges of 90nm Technology UHF RFID Tag
IC", sponsored by: 1) Innovation Technology Fund, HK$1,999,965; 2) ZTE
Corporation, $200,000; 3) AvantWave Limited, $50,000, July 2007 to December
Coordinator, ??Develop a Configurable RF Interface Module of UHF RFID Tag for
Different Technology Nodes??, sponsored by: 1) Guangdong-Hong Kong Technology
Cooperation Funding Scheme, Platform Research Scheme, Innovation Technology
Fund, Innovation & Technology Commission, $2,211,680; 2) Blue Solve Limited,
$200,000; 3) SourceCore Technology Inc. $50,000, June 2007 to June 2009.
Deputy Project Coordinator, "Development
of Optical Pickup Chipsets for Blue Laser DVDs" sponsored
by: 1) Guangdong-Hong Kong Technology Cooperation Funding Scheme, Platform
Research Scheme, Innovation Technology Fund, Innovation & Technology
Commission, $2,916,400; 2) SiliconCore (HK) Ltd., $300,000; 3) Jianghai
Electronic Co. Ltd., $40,000, March 2006 to December 2007.
Principal Investigator, ??Ultra low
voltage continuous-time Sigma Delta modulator", Direct Allocation Grant,
CUHK, HK$65,360, Jan. 2006 - Dec. 2006.
Principal Investigator, ??Integrated
Active RC Filters with Automatic Digital Frequency Tuning Based on Current
Division Principle" Direct Allocation Grant, CUHK, HK$150,000, Jan. 2005 -
Principal Investigator, "A CMOS RF
front-end chip for 3G WCDMA applications", Direct Grant, CUHK,
HK$150,000.00, Oct. 2001 - Sept. 2003.
S. Chatterjee, K.P.
Pun, N. Stanic, Y. Tsividis and P. Kinget,
Analog Circuit Design Techniques at 0.5V, Springer, July 2007.
K.P. Pun, J.E. Franca and C.A.
Circuit Design for Wireless Communications:
Improved Techniques for Image Rejection in Wideband Quadrature Receivers,
Boston, USA, Kluwer Academic Publishers, April 2003.
Chris C.F. Chan, K.P. Pun, K.N.
Leung, et al, "A Low-power Continuously-calibrated Clock Recovery Circuit
for UHF RFID EPC Class-1 Generation-2 Transponders",
IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp. 587-599, March
X.Y. He, K.P. Pun and P. Kinget,
"A 0.5-V Wideband Amplifier for a 1-MHz CT Complex Delta-Sigma Modulator??,
IEEE Trans. Circuits and Systems II - Express Briefs,
vol. 56, no.11, pp. 805-809, November, 2009.
K.P. Pun, C.S. Choy, C.F.
Chan and K.N. Leung, "A Fully Differential Band-Selective
Low-Noise Amplifier for MB-OFDM UWB Receivers", IEEE Trans. Circuits and
Systems II - Express Briefs, vol. 55, no.7, pp. 653-65, July, 2008.
K.P. Pun, S. Chatterjee and P.
Kinget, "A 0.5V 74dB SNDR 25kHz Ccontinuous-time
Delta Sigma Modulator with a
Return-to-Open DAC", IEEE Journal of
Solid-State Circuits, vol. 42, no. 3, pp. 496-507, March 2007 and
in Digest of
Tech. Papers, Iinternational
Solid-State Circuits Conference, pp. 72-73,
K.P. Pun, W.T. Cheng, C.S.
Choy and C.F. Chan, "A 75dB Image Rejection IF-Input Quadrature-Sampling
Modulator", IEEE Journal of Solid-State Circuits, vol. 41, no. 6,
pp.1353-1363, June 2006.
A. Wong, K.P. Pun, Y.T. Zhang and
K. Hung, "A Near-Infrared Heart Rate Measurement IC With Very Low Cutoff
Frequency using Current Steering Technique",
IEEE Transactions on Circuits and Systems: Part-I: Regular Papers,
vol.52, no. 12, pp.2642-2647, December 2005.
K.P. Pun, C.S. Choy, C.F. Chan and
J.E. Franca, ??An I/Q Mismatch-Free Switched-Capacitor Complex Sigma Delta
Modulator??, IEEE Transactions on Circuits and Systems: Part II, vol.
51, no. 5, pp.254-256, May 2004.
K.P. Pun, C.S. Choy, C.F. Chan and
J.E. Franca, "Digital frequency tuning technique based on current division
for integrated active RC filters", IEE
Electronics Letters, vo. 39, no. 19, pp.1366-1367, 18 September, 2003.
K.P. Pun, J.E. Franca, C. Azeredo
Leme and R. Reis, "Quadrature sampling schemes with improved image
rejection," IEEE Transactions on Circuits and Systems: Part II, vol.
50, no. 9, pp. 641-648, September, 2003.